/******************************************************************************\
 * Filename   : enc_vi.c
 * Copyright  : 
 * Created    : 2018-10-31 by litao
 * Description:
 * 
\******************************************************************************/
#include "enc_vi.h"

VI_DEV_ATTR_S DEV_ATTR_BT656D1_576P_1MUX =
{
    /* interface mode */
    VI_MODE_BT1120_STANDARD,
    /* multiplex mode */
    VI_WORK_MODE_1Multiplex,
    /* r_mask    g_mask    b_mask*/
    {0xFF000000,    0xFF0000},
	/* for single/double edge, must be set when double edge*/
	VI_CLK_EDGE_SINGLE_UP,

    /*AdChnId*/
    {-1, -1, -1, -1},
    /*enDataSeq, only support yuv*/
    VI_INPUT_DATA_UVUV,     
    /* synchronization information */
    {
    /*port_vsync   port_vsync_neg     port_hsync        port_hsync_neg        */
    VI_VSYNC_PULSE, VI_VSYNC_NEG_HIGH, VI_HSYNC_VALID_SINGNAL,VI_HSYNC_NEG_HIGH,VI_VSYNC_NORM_PULSE,VI_VSYNC_VALID_NEG_HIGH,
   
    /*hsync_hfb    hsync_act    hsync_hhb*/
    {0,            0,        0,
    /*vsync0_vhb vsync0_act vsync0_hhb*/
     0,            0,        0,
    /*vsync1_vhb vsync1_act vsync1_hhb*/ 
     0,            0,            0}
    },    
    /* ISP bypass */
    VI_PATH_BYPASS,
     /* input data type */
    VI_DATA_TYPE_YUV,
    /* bReverse */
    HI_FALSE
};

VI_DEV_ATTR_S DEV_ATTR_BT656D1_576I_1MUX =
{
    /* interface mode */
    VI_MODE_BT1120_STANDARD,
    /* multiplex mode */
    VI_WORK_MODE_1Multiplex,
    /* r_mask    g_mask    b_mask*/
    {0xFF000000,    0xFF0000},
	/* for single/double edge, must be set when double edge*/
	VI_CLK_EDGE_SINGLE_UP,

    /*AdChnId*/
    {-1, -1, -1, -1},
    /*enDataSeq, only support yuv*/
    VI_INPUT_DATA_UVUV,     
    /* synchronization information */
    {
    /*port_vsync   port_vsync_neg     port_hsync        port_hsync_neg        */
    VI_VSYNC_PULSE, VI_VSYNC_NEG_HIGH, VI_HSYNC_VALID_SINGNAL,VI_HSYNC_NEG_HIGH,VI_VSYNC_NORM_PULSE,VI_VSYNC_VALID_NEG_HIGH,
   
    /*hsync_hfb    hsync_act    hsync_hhb*/
    {0,            0,        0,
    /*vsync0_vhb vsync0_act vsync0_hhb*/
     0,            0,        0,
    /*vsync1_vhb vsync1_act vsync1_hhb*/ 
     0,            0,            0}
    },    
    /* ISP bypass */
    VI_PATH_BYPASS,
     /* input data type */
    VI_DATA_TYPE_YUV,
    /* bReverse */
    HI_FALSE
};

VI_DEV_ATTR_S DEV_ATTR_BT656D1_480P_1MUX =
{
    /* interface mode */
    VI_MODE_BT1120_STANDARD,
    /* multiplex mode */
    VI_WORK_MODE_1Multiplex,
    /* r_mask    g_mask    b_mask*/
    {0xFF000000,    0xFF0000},
	/* for single/double edge, must be set when double edge*/
	VI_CLK_EDGE_SINGLE_UP,

    /*AdChnId*/
    {-1, -1, -1, -1},
    /*enDataSeq, only support yuv*/
    VI_INPUT_DATA_UVUV,     
    /* synchronization information */
    {
    /*port_vsync   port_vsync_neg     port_hsync        port_hsync_neg        */
    VI_VSYNC_PULSE, VI_VSYNC_NEG_HIGH, VI_HSYNC_VALID_SINGNAL,VI_HSYNC_NEG_HIGH,VI_VSYNC_NORM_PULSE,VI_VSYNC_VALID_NEG_HIGH,
   
    /*hsync_hfb    hsync_act    hsync_hhb*/
    {0,            0,        0,
    /*vsync0_vhb vsync0_act vsync0_hhb*/
     0,            0,        0,
    /*vsync1_vhb vsync1_act vsync1_hhb*/ 
     0,            0,            0}
    },    
    /* ISP bypass */
    VI_PATH_BYPASS,
     /* input data type */
    VI_DATA_TYPE_YUV,
    /* bReverse */
    HI_FALSE
};

VI_DEV_ATTR_S DEV_ATTR_BT656D1_480I_1MUX =
{
    /* interface mode */
    VI_MODE_BT1120_STANDARD,
    /* multiplex mode */
    VI_WORK_MODE_1Multiplex,
    /* r_mask    g_mask    b_mask*/
    {0xFF000000,    0xFF0000},
	/* for single/double edge, must be set when double edge*/
	VI_CLK_EDGE_SINGLE_UP,

    /*AdChnId*/
    {-1, -1, -1, -1},
    /*enDataSeq, only support yuv*/
    VI_INPUT_DATA_UVUV,     
    /* synchronization information */
    {
    /*port_vsync   port_vsync_neg     port_hsync        port_hsync_neg        */
    VI_VSYNC_PULSE, VI_VSYNC_NEG_HIGH, VI_HSYNC_VALID_SINGNAL,VI_HSYNC_NEG_HIGH,VI_VSYNC_NORM_PULSE,VI_VSYNC_VALID_NEG_HIGH,
   
    /*hsync_hfb    hsync_act    hsync_hhb*/
    {0,            0,        0,
    /*vsync0_vhb vsync0_act vsync0_hhb*/
     0,            0,        0,
    /*vsync1_vhb vsync1_act vsync1_hhb*/ 
     0,            0,            0}
    },    
    /* ISP bypass */
    VI_PATH_BYPASS,
     /* input data type */
    VI_DATA_TYPE_YUV,
    /* bReverse */
    HI_FALSE 
};

/* BT1120 1080I���� */
VI_DEV_ATTR_S DEV_ATTR_BT1120_1080I_1MUX =
{
    /* interface mode */
    VI_MODE_BT1120_STANDARD,
    /* multiplex mode */
    VI_WORK_MODE_1Multiplex,
    /* r_mask    g_mask    b_mask*/
    {0xFF000000,    0xFF0000},
	/* for single/double edge, must be set when double edge*/
	VI_CLK_EDGE_SINGLE_UP,

    /*AdChnId*/
    {-1, -1, -1, -1},
    /*enDataSeq, only support yuv*/
    VI_INPUT_DATA_UVUV,

    /* synchronization information */
    {
    /*port_vsync   port_vsync_neg     port_hsync        port_hsync_neg        */
    VI_VSYNC_PULSE, VI_VSYNC_NEG_HIGH, VI_HSYNC_VALID_SINGNAL,VI_HSYNC_NEG_HIGH,VI_VSYNC_NORM_PULSE,VI_VSYNC_VALID_NEG_HIGH,
   
    /*hsync_hfb    hsync_act    hsync_hhb*/
    {0,            0,        0,
    /*vsync0_vhb vsync0_act vsync0_hhb*/
     0,            0,        0,
    /*vsync1_vhb vsync1_act vsync1_hhb*/ 
     0,            0,            0}
    },    
    /* ISP bypass */
    VI_PATH_BYPASS,
     /* input data type */
    VI_DATA_TYPE_YUV,
    /* bReverse */
    HI_FALSE   
};

/* BT1120 1080p */
VI_DEV_ATTR_S DEV_ATTR_BT1120_1080P_BASE =
{
    /* interface mode */
    VI_MODE_BT1120_STANDARD,
    /* multiplex mode */
    VI_WORK_MODE_1Multiplex,
    /* r_mask    g_mask    b_mask*/
    {0xFF000000,    0xFF0000},
	/* for single/double edge, must be set when double edge*/
	VI_CLK_EDGE_SINGLE_UP,

    /*AdChnId*/
    {-1, -1, -1, -1},
    /*enDataSeq, only support yuv*/
    VI_INPUT_DATA_UVUV,

    /* synchronization information */
    {
    /*port_vsync   port_vsync_neg     port_hsync        port_hsync_neg        */
    VI_VSYNC_PULSE, VI_VSYNC_NEG_HIGH, VI_HSYNC_VALID_SINGNAL,VI_HSYNC_NEG_HIGH,VI_VSYNC_NORM_PULSE,VI_VSYNC_VALID_NEG_HIGH,
   
    /*hsync_hfb    hsync_act    hsync_hhb*/
    {0,            0,        0,
    /*vsync0_vhb vsync0_act vsync0_hhb*/
     0,            0,        0,
    /*vsync1_vhb vsync1_act vsync1_hhb*/ 
     0,            0,            0}
    },    
    /* ISP bypass */
    VI_PATH_BYPASS,
     /* input data type */
    VI_DATA_TYPE_YUV,
    /* bReverse */
    HI_FALSE
};

 
/* BT1120 720P */
VI_DEV_ATTR_S DEV_ATTR_BT1120_720P_BASE =
/* classical timing 3:7441 BT1120 720P@60fps*/
{
    /* interface mode */
    VI_MODE_BT1120_STANDARD,
    /* multiplex mode */
    VI_WORK_MODE_1Multiplex,
    /* r_mask    g_mask    b_mask*/
    {0xFF000000,    0xFF0000},
	/* for single/double edge, must be set when double edge*/
	VI_CLK_EDGE_SINGLE_UP,

    //VI_SCAN_INTERLACED,
    /*AdChnId*/
    {-1, -1, -1, -1},
    /*enDataSeq, only support yuv*/
    VI_INPUT_DATA_UVUV,

     /* synchronization information */
    {
    /*port_vsync   port_vsync_neg     port_hsync        port_hsync_neg        */
    VI_VSYNC_PULSE, VI_VSYNC_NEG_HIGH, VI_HSYNC_VALID_SINGNAL,VI_HSYNC_NEG_HIGH,VI_VSYNC_NORM_PULSE,VI_VSYNC_VALID_NEG_HIGH,
    
    /*hsync_hfb    hsync_act    hsync_hhb*/
    {0,            1280,        0,
    /*vsync0_vhb vsync0_act vsync0_hhb*/
     0,            720,        0,
    /*vsync1_vhb vsync1_act vsync1_hhb*/
     0,            0,            0}
    },
    /* ISP bypass */
    VI_PATH_BYPASS,
    /* input data type */
    VI_DATA_TYPE_YUV,
    /* bReverse */
    HI_FALSE
};

int enc_i2c_open(char *p_dev)
{
	int fd = -1;

	fd = open(p_dev, O_RDWR);
	if (fd < 0) {
		enc_err("open %s error\n", p_dev);
		return -1;
	}

	return fd;
}

void enc_i2c_close(int fd)
{
	close(fd);
}

int enc_i2c_read(int fd, int i2c_addr, int data_addr, uint8_t *p_data, int data_len)
{
	int i;
	int ret;
	int read_len = 0;
	uint8_t read_buf[4];

	ret = ioctl(fd, I2C_SLAVE_FORCE, i2c_addr);
	if (ret < 0) {
		enc_err("CMD_SET_DEV error!\n");
		return -1;
	}
	ioctl(fd, I2C_16BIT_REG, 0);
	ioctl(fd, I2C_16BIT_DATA, 0);

	for (i=0; i<data_len; i++) {
		read_buf[0] = (data_addr + i) & 0xff;
		ret = read(fd, read_buf, 1);
		if (ret < 0) {
			enc_err("i2c read error\n");
			return -1;
		}

		*(p_data+read_len) = read_buf[0];
		read_len += ret;
	}

	return read_len;
}

int enc_i2c_write(int fd, int i2c_addr, int data_addr, uint8_t *p_data, int data_len)
{
	int i;
	int ret;
	uint8_t write_buf[4];

	ret = ioctl(fd, I2C_SLAVE_FORCE, i2c_addr);
	if (ret < 0) {
		enc_err("CMD_SET_DEV error!\n");
		return -1;
	}
	ioctl(fd, I2C_16BIT_REG, 0);
	ioctl(fd, I2C_16BIT_DATA, 0);

	for (i=0; i<data_len; i++) {
		write_buf[0] = (data_addr + i) & 0xff;
		write_buf[1] = *(p_data+i);
		ret = write(fd, write_buf, 2);
		if(ret < 0) {
			enc_err("i2c write error\n");
			return -1;
		}	

		//printf("i %d addr %X data %X\n", i, data_addr, *p_data);
 	}

	return data_len;	
}

int enc_hdmi_reset()
{
	return 0;
}

int enc_i2c_readByte(int fd, int i2c_addr, int data_addr, uint8_t *p_data)
{
	return enc_i2c_read(fd, i2c_addr, data_addr, p_data, 1);
}

int enc_i2c_writeByte(int fd, int i2c_addr, int data_addr, uint8_t data_value)
{
	return enc_i2c_write(fd, i2c_addr, data_addr, &data_value, 1);
}

int enc_i2c_readBytePart(int fd, int i2c_addr, int data_addr, uint8_t mask, uint8_t pos, uint8_t *p_data)
{
	int ret;
	uint8_t temp_data;

	ret = enc_i2c_readByte(fd, i2c_addr, data_addr, &temp_data);
	*p_data = (temp_data & mask) >> pos;

	return ret;
}

unsigned char hdmi_edid[256]= 
{
    0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0x4C,0x2D,0x4E,0x0C,0x46,0x53,0x4D,0x30,
    0x22,0x1A,0x01,0x03,0x80,0x3D,0x23,0x78,0x2A,0x5F,0xB1,0xA2,0x57,0x4F,0xA2,0x28,
    0x0F,0x50,0x54,0xBF,0xEF,0x80,0x71,0x4F,0x81,0x00,0x81,0xC0,0x81,0x80,0x95,0x00,
    0xA9,0xC0,0xB3,0x00,0x01,0x01,0x04,0x74,0x00,0x30,0xF2,0x70,0x5A,0x80,0xB0,0x58,
    0x8A,0x00,0x60,0x59,0x21,0x00,0x00,0x1E,0x00,0x00,0x00,0xFD,0x00,0x18,0x4B,0x1E,
    0x5A,0x1E,0x00,0x0A,0x20,0x20,0x20,0x20,0x20,0x20,0x00,0x00,0x00,0xFC,0x00,0x55,
    0x32,0x38,0x45,0x35,0x39,0x30,0x0A,0x20,0x20,0x20,0x20,0x20,0x00,0x00,0x00,0xFF,
    0x00,0x48,0x54,0x50,0x48,0x38,0x30,0x32,0x30,0x36,0x36,0x0A,0x20,0x20,0x01,0xF8
}; 


unsigned char vga_edid[256]={
0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, //00
0x06, 0x8F, 0x07, 0x11, 0x01, 0x00, 0x00, 0x00, //08
0x17, 0x11, 0x01, 0x03, 0x80, 0x0C, 0x09, 0x78, //10
0x0A, 0x1E, 0xAC, 0x98, 0x59, 0x56, 0x85, 0x28, //18
0x29, 0x52, 0x57, 0x00, 0x00, 0x00, 0x01, 0x01, //20
0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, //28
0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x8C, 0x0A, //30
0xD0, 0x8A, 0x20, 0xE0, 0x2D, 0x10, 0x10, 0x3E, //38
0x96, 0x00, 0x81, 0x60, 0x00, 0x00, 0x00, 0x18, //40
0x01, 0x1D, 0x80, 0x18, 0x71, 0x1C, 0x16, 0x20, //48
0x58, 0x2C, 0x25, 0x00, 0x81, 0x49, 0x00, 0x00, //50
0x00, 0x9E, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x56, //58
0x41, 0x2D, 0x31, 0x38, 0x30, 0x39, 0x41, 0x0A, //60
0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00, 0xFD, //68
0x00, 0x17, 0x3D, 0x0D, 0x3E, 0x11, 0x00, 0x0A, //70
0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x01, 0x1C, //78
0x02, 0x03, 0x34, 0x71, 0x4D, 0x82, 0x05, 0x04,   //80
0x01, 0x10, 0x11, 0x14, 0x13, 0x1F,0x06, 0x15,  //88
0x03, 0x12, 0x35, 0x0F, 0x7F, 0x07,0x17, 0x1F,
0x38, 0x1F, 0x07, 0x30, 0x2F, 0x07,0x72, 0x3F,
0x7F, 0x72, 0x57, 0x7F, 0x00, 0x37,0x7F, 0x72,
0x83, 0x4F, 0x00, 0x00, 0x67, 0x03,0x0C, 0x00,
0x10, 0x00, 0x88, 0x2D, 0x00, 0x00,0x00, 0xFF,
0x00, 0x0A, 0x20, 0x20, 0x20, 0x20,0x20, 0x20,
0x20, 0x20, 0x20, 0x20, 0x20, 0x20,0x00, 0x00,
0x00, 0xFF, 0x00, 0x0A, 0x20, 0x20,0x20, 0x20,
0x20, 0x20, 0x20, 0x20, 0x20, 0x20,0x20, 0x20,
0x00, 0x00, 0x00, 0xFF, 0x00, 0x0A,0x20, 0x20,
0x20, 0x20, 0x20, 0x20, 0x20, 0x20,0x20, 0x20,
0x20, 0x20, 0x00, 0x00, 0x00, 0x00,0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00,0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00,0x00, 0xDA,
};

int enc_hdmi_auto(enc_hdmi_dev *p_hdmi)
{
	int i;

#if 1
	//io
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ioaddr, 0x01, 0x06);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ioaddr, 0x02, 0xF5);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ioaddr, 0x03, 0x80);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ioaddr, 0x05, 0x2C);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ioaddr, 0x06, 0x8E);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ioaddr, 0x0B, 0x44);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ioaddr, 0x0C, 0x42);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ioaddr, 0x14, 0x7F);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ioaddr, 0x15, 0x80);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ioaddr, 0x19, 0x80);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ioaddr, 0x33, 0x40);



	//cp
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_cpaddr, 0xBA, 0x00);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_cpaddr, 0xC9, 0x05);

	//ksv
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ksvaddr, 0x40, 0x83);

	//hdmi
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_hdmiaddr, 0x9B, 0x03);
	for (i=0; i<12; i++) {
		enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_hdmiaddr, 0xC1+i, 0x01);
	}
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_hdmiaddr, 0x00, 0x00);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_hdmiaddr, 0x83, 0xFE);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_hdmiaddr, 0x85, 0x1f);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_hdmiaddr, 0x87, 0x70);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_hdmiaddr, 0x8D, 0x04);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_hdmiaddr, 0x8E, 0x1E);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_hdmiaddr, 0x1A, 0x8A);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_hdmiaddr, 0x57, 0xDA);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_hdmiaddr, 0x58, 0x01);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_hdmiaddr, 0x03, 0x98);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_hdmiaddr, 0x75, 0x10);
    
    //edid : xwt add

	for (i=0; i<256; i++) {
		enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, i, hdmi_edid[i]);
	}
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x00, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x01, 0xFF); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x02, 0xFF); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x03, 0xFF); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x04, 0xFF); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x05, 0xFF); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x06, 0xFF); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x07, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x08, 0x52); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x09, 0x74); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x0A, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x0B, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x0C, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x0D, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x0E, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x0F, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x10, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x11, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x12, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x13, 0x03); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x14, 0x80); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x15, 0x29); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x16, 0x1A); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x17, 0x78); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x18, 0x0A); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x19, 0xE5); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x1A, 0xB5); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x1B, 0xA3); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x1C, 0x55); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x1D, 0x49); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x1E, 0x99); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x1F, 0x27); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x20, 0x13); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x21, 0x50); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x22, 0x54); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x23, 0x23); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x24, 0x08); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x25, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x26, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x27, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x28, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x29, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x2A, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x2B, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x2C, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x2D, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x2E, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x2F, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x30, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x31, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x32, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x33, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x34, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x35, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x36, 0x02); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x37, 0x3A); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x38, 0x80); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x39, 0x18); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x3A, 0x71); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x3B, 0x38); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x3C, 0x2D); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x3D, 0x40); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x3E, 0x58); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x3F, 0x2C); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x40, 0x45); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x41, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x42, 0x80); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x43, 0x68); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x44, 0x21); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x45, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x46, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x47, 0x1E); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x48, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x49, 0x1D); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x4A, 0x80); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x4B, 0x18); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x4C, 0x71); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x4D, 0x38); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x4E, 0x2D); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x4F, 0x40); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x50, 0x58); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x51, 0x2C); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x52, 0x45); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x53, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x54, 0x80); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x55, 0x68); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x56, 0x21); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x57, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x58, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x59, 0x1E); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x5A, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x5B, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x5C, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x5D, 0xFC); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x5E, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x5F, 0x54); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x60, 0x45); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x61, 0x53); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x62, 0x54); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x63, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x64, 0x54); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x65, 0x56); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x66, 0x0A); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x67, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x68, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x69, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x6A, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x6B, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x6C, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x6D, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x6E, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x6F, 0xFD); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x70, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x71, 0x38); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x72, 0x3E); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x73, 0x1E); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x74, 0x44); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x75, 0x0F); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x76, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x77, 0x0A); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x78, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x79, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x7A, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x7B, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x7C, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x7D, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x7E, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x7F, 0x73); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x80, 0x02); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x81, 0x03); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x82, 0x1F); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x83, 0x79); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x84, 0x49); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x85, 0x81); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x86, 0x82); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x87, 0x83); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x88, 0x84); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x89, 0x85); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x8A, 0x86); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x8B, 0x87); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x8C, 0x90); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x8D, 0xA2); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x8E, 0x26); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x8F, 0x09); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x90, 0x57); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x91, 0x03); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x92, 0x15); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x93, 0x07); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x94, 0x50); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x95, 0x83); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x96, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x97, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x98, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x99, 0x65); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x9A, 0x03); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x9B, 0x0C); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x9C, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x9D, 0x11); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x9E, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x9F, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xA0, 0x1D); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xA1, 0x80); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xA2, 0x18); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xA3, 0x71); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xA4, 0x1C); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xA5, 0x16); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xA6, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xA7, 0x58); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xA8, 0x2C); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xA9, 0x25); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xAA, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xAB, 0x80); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xAC, 0x68); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xAD, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xAE, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xAF, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xB0, 0x9E); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xB1, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xB2, 0x1D); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xB3, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xB4, 0x72); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xB5, 0x51); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xB6, 0xD0); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xB7, 0x1E); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xB8, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xB9, 0x6E); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xBA, 0x28); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xBB, 0x55); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xBC, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xBD, 0x80); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xBE, 0x68); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xBF, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xC0, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xC1, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xC2, 0x1E); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xC3, 0x8C); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xC4, 0x0A); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xC5, 0xD0); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xC6, 0x8A); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xC7, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xC8, 0xE0); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xC9, 0x2D); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xCA, 0x10); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xCB, 0x10); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xCC, 0x3E); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xCD, 0x96); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xCE, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xCF, 0x80); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xD0, 0x68); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xD1, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xD2, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xD3, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xD4, 0x18); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xD5, 0x8C); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xD6, 0x0A); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xD7, 0xA0); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xD8, 0x14); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xD9, 0x51); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xDA, 0xF0); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xDB, 0x16); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xDC, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xDD, 0x26); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xDE, 0x7C); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xDF, 0x43); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xE0, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xE1, 0x80); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xE2, 0x68); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xE3, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xE4, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xE5, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xE6, 0x98); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xE7, 0x8C); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xE8, 0x0A); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xE9, 0xD0); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xEA, 0x8A); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xEB, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xEC, 0xE0); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xED, 0x2D); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xEE, 0x10); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xEF, 0x10); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xF0, 0x3E); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xF1, 0x96); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xF2, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xF3, 0x90); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xF4, 0x2C); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xF5, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xF6, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xF7, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xF8, 0x18); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xF9, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xFA, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xFB, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xFC, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xFD, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xFE, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xFF, 0xC5); // 

	sleep(1);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ksvaddr, 0x77, 0x00);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ksvaddr, 0x52, 0x20);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ksvaddr, 0x53, 0x00);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ksvaddr, 0x70, 0x9E);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ksvaddr, 0x74, 0x03);



#else
	//io
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ioaddr, 0x00, 0x1E);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ioaddr, 0x01, 0x05);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ioaddr, 0x02, 0xF5);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ioaddr, 0x03, 0x80);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ioaddr, 0x05, 0x28);
	//enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ioaddr, 0x06, 0x8E);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ioaddr, 0x0B, 0x44);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ioaddr, 0x0C, 0x42);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ioaddr, 0x14, 0x7F);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ioaddr, 0x15, 0x80);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ioaddr, 0x19, 0x83);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ioaddr, 0x33, 0x40);



	//cp
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_cpaddr, 0xBA, 0x01);
	//enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_cpaddr, 0xC9, 0x05);

	//ksv
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ksvaddr, 0x40, 0x81);

	//hdmi
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_hdmiaddr, 0x9B, 0x03);
	for (i=0; i<12; i++) {
		enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_hdmiaddr, 0xC1+i, 0x01);
	}
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_hdmiaddr, 0x00, 0x00);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_hdmiaddr, 0x83, 0xFE);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_hdmiaddr, 0x6F, 0x0C);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_hdmiaddr, 0x85, 0x1F);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_hdmiaddr, 0x87, 0x70);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_hdmiaddr, 0x8D, 0x04);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_hdmiaddr, 0x8E, 0x1E);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_hdmiaddr, 0x1A, 0x8A);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_hdmiaddr, 0x57, 0xDA);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_hdmiaddr, 0x58, 0x01);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_hdmiaddr, 0x03, 0x98);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_hdmiaddr, 0x75, 0x10);

	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ksvaddr, 0x77, 0x00);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ksvaddr, 0x74, 0x00);

	/*for (i=0; i<256; i++) {
		enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, i, vga_edid[i]);
	}*/


	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x00, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x01, 0xFF); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x02, 0xFF); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x03, 0xFF); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x04, 0xFF); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x05, 0xFF); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x06, 0xFF); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x07, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x08, 0x52); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x09, 0x74); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x0A, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x0B, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x0C, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x0D, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x0E, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x0F, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x10, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x11, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x12, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x13, 0x03); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x14, 0x80); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x15, 0x29); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x16, 0x1A); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x17, 0x78); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x18, 0x0A); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x19, 0xE5); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x1A, 0xB5); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x1B, 0xA3); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x1C, 0x55); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x1D, 0x49); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x1E, 0x99); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x1F, 0x27); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x20, 0x13); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x21, 0x50); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x22, 0x54); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x23, 0x23); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x24, 0x08); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x25, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x26, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x27, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x28, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x29, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x2A, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x2B, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x2C, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x2D, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x2E, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x2F, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x30, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x31, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x32, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x33, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x34, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x35, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x36, 0x02); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x37, 0x3A); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x38, 0x80); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x39, 0x18); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x3A, 0x71); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x3B, 0x38); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x3C, 0x2D); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x3D, 0x40); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x3E, 0x58); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x3F, 0x2C); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x40, 0x45); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x41, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x42, 0x80); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x43, 0x68); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x44, 0x21); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x45, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x46, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x47, 0x1E); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x48, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x49, 0x1D); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x4A, 0x80); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x4B, 0x18); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x4C, 0x71); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x4D, 0x38); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x4E, 0x2D); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x4F, 0x40); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x50, 0x58); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x51, 0x2C); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x52, 0x45); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x53, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x54, 0x80); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x55, 0x68); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x56, 0x21); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x57, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x58, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x59, 0x1E); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x5A, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x5B, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x5C, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x5D, 0xFC); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x5E, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x5F, 0x54); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x60, 0x45); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x61, 0x53); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x62, 0x54); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x63, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x64, 0x54); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x65, 0x56); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x66, 0x0A); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x67, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x68, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x69, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x6A, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x6B, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x6C, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x6D, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x6E, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x6F, 0xFD); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x70, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x71, 0x38); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x72, 0x3E); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x73, 0x1E); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x74, 0x44); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x75, 0x0F); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x76, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x77, 0x0A); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x78, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x79, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x7A, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x7B, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x7C, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x7D, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x7E, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x7F, 0x73); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x80, 0x02); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x81, 0x03); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x82, 0x1F); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x83, 0x79); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x84, 0x49); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x85, 0x81); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x86, 0x82); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x87, 0x83); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x88, 0x84); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x89, 0x85); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x8A, 0x86); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x8B, 0x87); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x8C, 0x90); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x8D, 0xA2); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x8E, 0x26); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x8F, 0x09); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x90, 0x57); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x91, 0x03); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x92, 0x15); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x93, 0x07); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x94, 0x50); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x95, 0x83); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x96, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x97, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x98, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x99, 0x65); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x9A, 0x03); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x9B, 0x0C); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x9C, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x9D, 0x11); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x9E, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0x9F, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xA0, 0x1D); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xA1, 0x80); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xA2, 0x18); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xA3, 0x71); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xA4, 0x1C); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xA5, 0x16); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xA6, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xA7, 0x58); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xA8, 0x2C); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xA9, 0x25); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xAA, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xAB, 0x80); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xAC, 0x68); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xAD, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xAE, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xAF, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xB0, 0x9E); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xB1, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xB2, 0x1D); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xB3, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xB4, 0x72); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xB5, 0x51); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xB6, 0xD0); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xB7, 0x1E); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xB8, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xB9, 0x6E); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xBA, 0x28); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xBB, 0x55); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xBC, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xBD, 0x80); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xBE, 0x68); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xBF, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xC0, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xC1, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xC2, 0x1E); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xC3, 0x8C); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xC4, 0x0A); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xC5, 0xD0); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xC6, 0x8A); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xC7, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xC8, 0xE0); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xC9, 0x2D); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xCA, 0x10); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xCB, 0x10); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xCC, 0x3E); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xCD, 0x96); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xCE, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xCF, 0x80); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xD0, 0x68); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xD1, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xD2, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xD3, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xD4, 0x18); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xD5, 0x8C); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xD6, 0x0A); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xD7, 0xA0); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xD8, 0x14); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xD9, 0x51); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xDA, 0xF0); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xDB, 0x16); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xDC, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xDD, 0x26); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xDE, 0x7C); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xDF, 0x43); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xE0, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xE1, 0x80); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xE2, 0x68); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xE3, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xE4, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xE5, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xE6, 0x98); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xE7, 0x8C); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xE8, 0x0A); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xE9, 0xD0); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xEA, 0x8A); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xEB, 0x20); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xEC, 0xE0); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xED, 0x2D); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xEE, 0x10); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xEF, 0x10); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xF0, 0x3E); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xF1, 0x96); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xF2, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xF3, 0x90); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xF4, 0x2C); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xF5, 0x01); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xF6, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xF7, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xF8, 0x18); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xF9, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xFA, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xFB, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xFC, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xFD, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xFE, 0x00); // 
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_edidaddr, 0xFF, 0xC5); // 

	
	sleep(1);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ksvaddr, 0x77, 0x00);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ksvaddr, 0x52, 0x20);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ksvaddr, 0x53, 0x00);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ksvaddr, 0x70, 0x9E);
	enc_i2c_writeByte(p_hdmi->i2c_fd, p_hdmi->i2c_ksvaddr, 0x74, 0x03);	
#endif
	return 0;
}

uint8_t	enc_hdmi_getStatus(enc_hdmi_dev *p_hdmi)
{
	uint8_t	status;
	uint8_t	cable_det;
	uint8_t TMDS_clock_det;
	uint8_t TMDS_clock_lock;
	uint8_t HDMI_encrypt;
	uint8_t DE_lock;
	
	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_ioaddr,0x6F,0x01,0x00, &cable_det);
	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_ioaddr,0x6A,0x10,0x04, &TMDS_clock_det);
	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x04,0x02,0x01, &TMDS_clock_lock);
	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x05,0x40,0x06, &HDMI_encrypt);
	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x07,0x20,0x05, &DE_lock);

	status = (cable_det<<4) | (TMDS_clock_det<<3) | (TMDS_clock_lock<<2) | (HDMI_encrypt<<1) | (DE_lock<<0);

	//enc_info("hdmi status %X\n", status);
	
	return status;
}

int enc_hdmi_getFrameRate(enc_hdmi_dev *p_hdmi)
{
	uint16_t TMDS_freq;
	uint8_t	 TMDS_freq_frac;
	uint8_t  temp_data;

	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x51,0xFF,0x00,&temp_data);
	TMDS_freq = temp_data << 1;
	
	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x52,0x80,0x07,&temp_data);
	
	TMDS_freq |= temp_data;
	enc_info("hdmi tmds freq %d\n", TMDS_freq);

	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x52,0x7F,0x00,&temp_data);
	TMDS_freq_frac = temp_data;
	
	enc_info("hdmi tmds frac %d\n", TMDS_freq_frac);

	return 0;
}

int enc_hdmi_getTotalWidth(enc_hdmi_dev *p_hdmi)
{
	int total_width;
	uint8_t temp_data;

	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x1F,0xFF,0x00,&temp_data);
	total_width = temp_data;

	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x1E,0x3F,0x00,&temp_data);
	total_width |= temp_data << 8;

	enc_info("video total width %d\n", total_width);

	return 0;
}


int enc_hdmi_getWidth(enc_hdmi_dev *p_hdmi)
{
	int width;
	uint8_t temp_data;

	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x08,0xFF,0x00,&temp_data);
	width = temp_data;

	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x07,0x1F,0x00,&temp_data);
	width |= temp_data << 8;

	enc_info("video width %d\n", width);

	return 0;
}

int enc_hdmi_getTotalHeight(enc_hdmi_dev *p_hdmi)
{
	int total_height;
	uint8_t temp_data;

	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x27,0xFF,0x00,&temp_data);
	total_height = temp_data;

	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x26,0x3F,0x00,&temp_data);
	total_height |= temp_data << 8;

	enc_info("video feild 0 total height %d\n", total_height);

	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x29,0xFF,0x00,&temp_data);
	total_height = temp_data;

	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x28,0x3F,0x00,&temp_data);
	total_height |= temp_data << 8;

	enc_info("video feild 1 total height %d\n", total_height);	

	return 0;
}

int enc_hdmi_getHeight(enc_hdmi_dev *p_hdmi)
{
	int height;
	uint8_t temp_data;

	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x0A,0xFF,0x00,&temp_data);
	height = temp_data;

	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x09,0x1F,0x00,&temp_data);
	height |= temp_data << 8;

	enc_info("video feild 0 height %d\n", height);

	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x0C,0xFF,0x00,&temp_data);
	height = temp_data;

	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x0B,0x1F,0x00,&temp_data);
	height |= temp_data << 8;

	enc_info("video feild 1 height %d\n", height);	

	return 0;	
}

int enc_hdmi_getInterlaced(enc_hdmi_dev *p_hdmi)
{
	uint8_t temp_data;

	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x0B,0x20,0x05,&temp_data);
	enc_info("video interlace %d\n", temp_data);	

	return 0;
}

int enc_hdmi_inputFormat(void)
{
	int ret;
	int width;
	int height;	
	int total_height;
	int total_width;
	int frame_rate;
	uint16_t TMDS_freq;
	uint8_t	 TMDS_freq_frac;
	uint8_t interlace;
	uint8_t temp_data;
	enc_hdmi_dev *p_hdmi = &main_data.hdmi_dev;

	ret = enc_hdmi_getStatus(p_hdmi);
	if ((ret != 0x1F) && (ret != 0x1D)) {
		return -1;
	}

	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x1F,0xFF,0x00,&temp_data);
	total_width = temp_data;

	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x1E,0x3F,0x00,&temp_data);
	total_width |= temp_data << 8;

	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x08,0xFF,0x00,&temp_data);
	width = temp_data;

	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x07,0x1F,0x00,&temp_data);
	width |= temp_data << 8;

	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x27,0xFF,0x00,&temp_data);
	total_height = temp_data;

	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x26,0x3F,0x00,&temp_data);
	total_height |= temp_data << 8;

	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x0A,0xFF,0x00,&temp_data);
	height = temp_data;

	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x09,0x1F,0x00,&temp_data);
	height |= temp_data << 8;	

	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x0B,0x20,0x05,&temp_data);
	interlace = temp_data;

	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x51,0xFF,0x00,&temp_data);
	TMDS_freq = temp_data << 1;
	
	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x52,0x80,0x07,&temp_data);
	
	TMDS_freq |= temp_data;

	enc_i2c_readBytePart(p_hdmi->i2c_fd,p_hdmi->i2c_hdmiaddr,0x52,0x7F,0x00,&temp_data);
	TMDS_freq_frac = temp_data;	

	if (interlace) {
		height <<= 1;
	}
	
	if ((width > 1910) && (width < 1930) && (height > 1070)) {
		width = 1920;
		height = 1080;
	} else if ((width > 1270) && (width < 1290) && (height > 710)) {
		width = 1280;
		height = 720;
	} else if ((height < 580) && (height > 570)) {
		width = 720;
		height = 576;
	} else if ((height < 490) && (height > 470)) {
		width = 1280;
		height = 720;
	} else {
		enc_err("unknown resolution %dx%d or no input\n", width, height);
		return -1;
	}

	frame_rate = (TMDS_freq*1000000+TMDS_freq_frac*7812)/total_width/total_height;
	if (!interlace) {
		frame_rate <<= 1;
	}

	if ((frame_rate > 55) && (frame_rate < 65)) {
		frame_rate = 60;
	} else if ((frame_rate > 45) && (frame_rate < 55)) {
		frame_rate = 50;
	} else if ((frame_rate > 28) && (frame_rate < 32)) {
		frame_rate = 30;
	} else if ((frame_rate > 23) && (frame_rate < 27)) {
		frame_rate = 25;
	} else {
		enc_err("unknown frame rate %dfps or no input\n", frame_rate);
		return -1;
	} 

//	enc_info("video %dx%d@%d%s\n", width, height, interlace ? frame_rate << 1 : frame_rate, interlace ? "I" : "P");
	p_hdmi->vi_info.valid = 1;
	p_hdmi->vi_info.width = width;
	p_hdmi->vi_info.height = height;
	p_hdmi->vi_info.interlace = interlace;
	p_hdmi->vi_info.fps = frame_rate;

	pENC_CHLSET p_chanSet;
	p_chanSet = &g_encset_slv->enc_chls[g_chlidx];
	p_chanSet->encchl_vid.vid_fpsnum = 1;
	p_chanSet->encchl_vid.vid_fpsden = frame_rate;

	return 0;
}

int enc_hdmi_init(void)
{
	int fd;
	uint8_t temp_data;
	uint16_t dev_id;
	enc_hdmi_dev *p_hdmi = &main_data.hdmi_dev;

	if ((main_data.chan_srcnum == 0) || (main_data.chan_srcnum == 1)) {
		sprintf(p_hdmi->i2c_dev, ENC_HDMI_I2C0DEV);
		fd = open(p_hdmi->i2c_dev, O_RDWR);
		if (fd < 0) {
			enc_err("open %s error\n", p_hdmi->i2c_dev);
			return -1;
		}
		
		//if (!g_encset_slv->enc_chlshare.i2c0_init) {
			temp_data = 0x01;
			//sample new addr, pull up is 0x9A, pull down is 0x98
			enc_i2c_write(fd, ENC_HDMI_IOADDR, 0x1B, &temp_data, 1);
			
			//sem_init(&g_encset_slv->enc_chlshare.i2c0_lock, 0, 1);
			//g_encset_slv->enc_chlshare.i2c0_init  = 1;
		//}

		if (main_data.chan_srcnum == 0) {
			p_hdmi->i2c_ioaddr   = ENC_HDMI1_I2CADDR;
			p_hdmi->i2c_cecaddr  = ENC_HDMI1_MAPSTART;
			p_hdmi->i2c_infoaddr = ENC_HDMI1_MAPSTART+0x02;
			p_hdmi->i2c_dplladdr = ENC_HDMI1_MAPSTART+0x04;
			p_hdmi->i2c_ksvaddr  = ENC_HDMI1_MAPSTART+0x06;
			p_hdmi->i2c_edidaddr = ENC_HDMI1_MAPSTART+0x08;
			p_hdmi->i2c_hdmiaddr = ENC_HDMI1_MAPSTART+0x0A;
			p_hdmi->i2c_cpaddr 	 = ENC_HDMI1_MAPSTART+0x0C;			
		} else {
			p_hdmi->i2c_ioaddr	 = ENC_HDMI2_I2CADDR;
			p_hdmi->i2c_cecaddr  = ENC_HDMI2_MAPSTART;
			p_hdmi->i2c_infoaddr = ENC_HDMI2_MAPSTART+0x02;
			p_hdmi->i2c_dplladdr = ENC_HDMI2_MAPSTART+0x04;
			p_hdmi->i2c_ksvaddr  = ENC_HDMI2_MAPSTART+0x06;
			p_hdmi->i2c_edidaddr = ENC_HDMI2_MAPSTART+0x08;
			p_hdmi->i2c_hdmiaddr = ENC_HDMI2_MAPSTART+0x0A;
			p_hdmi->i2c_cpaddr	 = ENC_HDMI2_MAPSTART+0x0C;
		}
	} else if ((main_data.chan_srcnum == 2) || (main_data.chan_srcnum == 3)) {
		sprintf(p_hdmi->i2c_dev, ENC_HDMI_I2C1DEV);
		fd = open(p_hdmi->i2c_dev, O_RDWR);
		if (fd < 0) {
			enc_err("open %s error\n", p_hdmi->i2c_dev);
			return -1;
		}
		
		//if (!g_encset_slv->enc_chlshare.i2c1_init) {
			temp_data = 0x01;
			//sample new addr, pull up is 0x9A, pull down is 0x98
			enc_i2c_write(fd, ENC_HDMI_IOADDR, 0x1B, &temp_data, 1);
			
			//sem_init(&g_encset_slv->enc_chlshare.i2c1_lock, 0, 1);			
			//g_encset_slv->enc_chlshare.i2c1_init  = 1;
		//}

		if (main_data.chan_srcnum == 2) {
			p_hdmi->i2c_ioaddr	 = ENC_HDMI3_I2CADDR;
			p_hdmi->i2c_cecaddr  = ENC_HDMI3_MAPSTART;
			p_hdmi->i2c_infoaddr = ENC_HDMI3_MAPSTART+0x02;
			p_hdmi->i2c_dplladdr = ENC_HDMI3_MAPSTART+0x04;
			p_hdmi->i2c_ksvaddr  = ENC_HDMI3_MAPSTART+0x06;
			p_hdmi->i2c_edidaddr = ENC_HDMI3_MAPSTART+0x08;
			p_hdmi->i2c_hdmiaddr = ENC_HDMI3_MAPSTART+0x0A;
			p_hdmi->i2c_cpaddr	 = ENC_HDMI3_MAPSTART+0x0C;

		} else {
			p_hdmi->i2c_ioaddr	 = ENC_HDMI4_I2CADDR;
			p_hdmi->i2c_cecaddr  = ENC_HDMI4_MAPSTART;
			p_hdmi->i2c_infoaddr = ENC_HDMI4_MAPSTART+0x02;
			p_hdmi->i2c_dplladdr = ENC_HDMI4_MAPSTART+0x04;
			p_hdmi->i2c_ksvaddr  = ENC_HDMI4_MAPSTART+0x06;
			p_hdmi->i2c_edidaddr = ENC_HDMI4_MAPSTART+0x08;
			p_hdmi->i2c_hdmiaddr = ENC_HDMI4_MAPSTART+0x0A;
			p_hdmi->i2c_cpaddr	 = ENC_HDMI4_MAPSTART+0x0C;
		}		
	}

	enc_i2c_write(fd, p_hdmi->i2c_ioaddr, ENC_HDMI_CECMAPREG, &p_hdmi->i2c_cecaddr, 1);
	enc_i2c_write(fd, p_hdmi->i2c_ioaddr, ENC_HDMI_INFOMAPREG, &p_hdmi->i2c_infoaddr, 1);
	enc_i2c_write(fd, p_hdmi->i2c_ioaddr, ENC_HDMI_DPLLMAPREG, &p_hdmi->i2c_dplladdr, 1);
	enc_i2c_write(fd, p_hdmi->i2c_ioaddr, ENC_HDMI_KSVMAPREG, &p_hdmi->i2c_ksvaddr, 1);
	enc_i2c_write(fd, p_hdmi->i2c_ioaddr, ENC_HDMI_EDIDMAPREG, &p_hdmi->i2c_edidaddr, 1);
	enc_i2c_write(fd, p_hdmi->i2c_ioaddr, ENC_HDMI_HDMIMAPREG, &p_hdmi->i2c_hdmiaddr, 1);
	enc_i2c_write(fd, p_hdmi->i2c_ioaddr, ENC_HDMI_CPMAPREG, &p_hdmi->i2c_cpaddr, 1);

	//read device model
	enc_i2c_read(fd, p_hdmi->i2c_ioaddr, 0xEA, (uint8_t *)&dev_id, sizeof(dev_id));

	enc_info("HDMI device id:0x%X\n", dev_id);
	p_hdmi->i2c_fd = fd;

	enc_hdmi_auto(&main_data.hdmi_dev);	
	
	return 0;
}


int enc_hdmi_input(void)
{
	int ret;

	ret = enc_hdmi_init();
	if (ret != 0) {
		enc_err("enc_hdmi_init error\n");
		return -1;
	}

	while (1) {
		enc_hdmi_getTotalWidth(&main_data.hdmi_dev);
		enc_hdmi_getWidth(&main_data.hdmi_dev);
		enc_hdmi_getTotalHeight(&main_data.hdmi_dev);
		enc_hdmi_getHeight(&main_data.hdmi_dev);
		enc_hdmi_getInterlaced(&main_data.hdmi_dev);
		enc_hdmi_getFrameRate(&main_data.hdmi_dev);

		enc_hdmi_inputFormat();
		
		sleep(1);
	}
}

HI_S32 enc_vi_SelectParam(enc_vi_param_s *pstViParam)
{
	//DEV use 0,2, 4, 6
	//VI  use 0,8,16,24
    pstViParam->s32ViDevCnt = 4;
    pstViParam->s32ViDevInterval = 2;
    pstViParam->s32ViChnCnt = 4;
    pstViParam->s32ViChnInterval = 8;
			
    return HI_SUCCESS;
}

/*****************************************************************************
* function : get vi parameter, according to vi type
*****************************************************************************/
HI_S32 enc_vi_Mode2Size(enc_vi_mode_e enViMode, RECT_S *pstCapRect, SIZE_S *pstDestSize)
{
    pstCapRect->s32X = 0;
    pstCapRect->s32Y = 0;
    switch (enViMode)
    {
		case ENC_VI_MODE_4_480I:
		case ENC_VI_MODE_4_480P:
            pstDestSize->u32Width  = 720;
            pstDestSize->u32Height = 480;
            pstCapRect->u32Width  = 720;
            pstCapRect->u32Height = 480;			
			break;
			
		case ENC_VI_MODE_4_576I:
		case ENC_VI_MODE_4_576P:
            pstDestSize->u32Width  = 720;
            pstDestSize->u32Height = 576;
            pstCapRect->u32Width  = 720;
            pstCapRect->u32Height = 576;	

        case ENC_VI_MODE_4_720P:
            pstDestSize->u32Width  = 1280;
            pstDestSize->u32Height = 720;
            pstCapRect->u32Width  = 1280;
            pstCapRect->u32Height = 720;
            break;

        case ENC_VI_MODE_4_1080I:
        case ENC_VI_MODE_4_1080P:
            pstDestSize->u32Width  = 1920;
            pstDestSize->u32Height = 1080;
            pstCapRect->u32Width  = 1920;
            pstCapRect->u32Height = 1080;
            break;           

        default:
            enc_err("vi mode invaild!\n");
            return HI_FAILURE;
    }
    
    return HI_SUCCESS;
}

/*****************************************************************************
* function : config HDMI phy reg
*****************************************************************************/
HI_S32 enc_vi_HDMI(void)
{
    HI_S32 ret = 0;

	return ret;
}


/*****************************************************************************
* function : star vi dev (cfg vi_dev_attr; set_dev_cfg; enable dev)
*****************************************************************************/
HI_S32 enc_vi_StartDev(VI_DEV ViDev, enc_vi_mode_e enViMode)
{
    HI_S32 s32Ret;
    VI_DEV_ATTR_S stViDevAttr;
    memset(&stViDevAttr,0,sizeof(stViDevAttr));

    switch (enViMode)
    {
		case ENC_VI_MODE_4_480I:
			memcpy(&stViDevAttr,&DEV_ATTR_BT656D1_480I_1MUX,sizeof(stViDevAttr));
			break;

		case ENC_VI_MODE_4_480P:
			memcpy(&stViDevAttr,&DEV_ATTR_BT656D1_480P_1MUX,sizeof(stViDevAttr));
			break;	
		
		case ENC_VI_MODE_4_576I:
			memcpy(&stViDevAttr,&DEV_ATTR_BT656D1_576I_1MUX,sizeof(stViDevAttr));
			break;

		case ENC_VI_MODE_4_576P:
			memcpy(&stViDevAttr,&DEV_ATTR_BT656D1_576P_1MUX,sizeof(stViDevAttr));
			break;
		
	    case ENC_VI_MODE_4_720P:
		    memcpy(&stViDevAttr,&DEV_ATTR_BT1120_720P_BASE,sizeof(stViDevAttr));        
		    break;

	    case ENC_VI_MODE_4_1080I:
	        memcpy(&stViDevAttr,&DEV_ATTR_BT1120_1080I_1MUX,sizeof(stViDevAttr));
	        break;

	    case ENC_VI_MODE_4_1080P:			
			memcpy(&stViDevAttr,&DEV_ATTR_BT1120_1080P_BASE,sizeof(stViDevAttr));   
			break;
						
        default:
            enc_err("vi input type[%d] is invalid!\n", enViMode);
            return HI_FAILURE;
    }
	
    s32Ret = HI_MPI_VI_SetDevAttr(ViDev, &stViDevAttr);
    if (s32Ret != HI_SUCCESS)
    {
        enc_err("HI_MPI_VI_SetDevAttr failed with %#x!\n", s32Ret);
        return HI_FAILURE;
    }

    s32Ret = HI_MPI_VI_EnableDev(ViDev);
    if (s32Ret != HI_SUCCESS)
    {
        enc_err("HI_MPI_VI_EnableDev failed with %#x!\n", s32Ret);
        return HI_FAILURE;
    }

    return HI_SUCCESS;
}

HI_S32 enc_vi_StartDev2(VI_DEV ViDev, stENC_VI_INFO *p_videoin)
{
    HI_S32 s32Ret;
    VI_DEV_ATTR_S stViDevAttr;
	
    memset(&stViDevAttr,0,sizeof(stViDevAttr));

	if ((p_videoin->width == 1920) && (p_videoin->height == 1080) && 
		(p_videoin->interlace == 0)) {
		memcpy(&stViDevAttr,&DEV_ATTR_BT1120_1080P_BASE,sizeof(stViDevAttr));	
	} else if ((p_videoin->width == 1920) && (p_videoin->height == 1080) && 
		(p_videoin->interlace == 1)) {
		memcpy(&stViDevAttr,&DEV_ATTR_BT1120_1080I_1MUX,sizeof(stViDevAttr));	
	} else if ((p_videoin->width == 1280) && (p_videoin->height == 720) && 
		(p_videoin->interlace == 0)) {
		memcpy(&stViDevAttr,&DEV_ATTR_BT1120_720P_BASE,sizeof(stViDevAttr));	
	} else if ((p_videoin->width == 720) && (p_videoin->height == 576) && 
		(p_videoin->interlace == 0)) {
		memcpy(&stViDevAttr,&DEV_ATTR_BT656D1_576P_1MUX,sizeof(stViDevAttr));	
	} else if ((p_videoin->width == 720) && (p_videoin->height == 576) && 
		(p_videoin->interlace == 1)) {
		memcpy(&stViDevAttr,&DEV_ATTR_BT656D1_576I_1MUX,sizeof(stViDevAttr));	
	} else if ((p_videoin->width == 720) && (p_videoin->height == 480) && 
		(p_videoin->interlace == 0)) {
		memcpy(&stViDevAttr,&DEV_ATTR_BT656D1_480P_1MUX,sizeof(stViDevAttr));	
	} else if ((p_videoin->width == 720) && (p_videoin->height == 480) && 
		(p_videoin->interlace == 1)) {
		memcpy(&stViDevAttr,&DEV_ATTR_BT656D1_480I_1MUX,sizeof(stViDevAttr));	
	} else {
		enc_err("vi input para is invalid!\n");
		return HI_FAILURE;
	}
	
    s32Ret = HI_MPI_VI_SetDevAttr(ViDev, &stViDevAttr);
    if (s32Ret != HI_SUCCESS)
    {
        enc_err("HI_MPI_VI_SetDevAttr failed with %#x!\n", s32Ret);
        return HI_FAILURE;
    }

    s32Ret = HI_MPI_VI_EnableDev(ViDev);
    if (s32Ret != HI_SUCCESS)
    {
        enc_err("HI_MPI_VI_EnableDev failed with %#x!\n", s32Ret);
        return HI_FAILURE;
    }

    return HI_SUCCESS;
}


/*****************************************************************************
* function : star vi chn
*****************************************************************************/
HI_S32 enc_vi_StartChn(VI_CHN ViChn, RECT_S *pstCapRect, SIZE_S *pstTarSize, 
    int interlace, enc_vi_chn_set_e enViChnSet)
{
    HI_S32 s32Ret;
    VI_CHN_ATTR_S stChnAttr;

    /* step  5: config & start vicap dev */
    memcpy(&stChnAttr.stCapRect, pstCapRect, sizeof(RECT_S));
    /* to show scale. this is a sample only, we want to show dist_size = D1 only */
    stChnAttr.stDestSize.u32Width = pstTarSize->u32Width;
    stChnAttr.stDestSize.u32Height = pstTarSize->u32Height;
    stChnAttr.enCapSel = VI_CAPSEL_BOTH;
    stChnAttr.enPixFormat = ENC_PIXEL_FORMAT;   /* sp420 or sp422 */
    stChnAttr.bMirror = (VI_CHN_SET_MIRROR == enViChnSet)?HI_TRUE:HI_FALSE;
    stChnAttr.bFlip = (VI_CHN_SET_FILP == enViChnSet)?HI_TRUE:HI_FALSE;
    stChnAttr.s32SrcFrameRate = -1;
    stChnAttr.s32DstFrameRate = -1;

	if (interlace) {
		stChnAttr.enScanMode = VI_SCAN_INTERLACED;
	} else {
		stChnAttr.enScanMode = VI_SCAN_PROGRESSIVE;
	}

    s32Ret = HI_MPI_VI_SetChnAttr(ViChn, &stChnAttr);
    if (s32Ret != HI_SUCCESS)
    {
        enc_err("failed with %#x!\n", s32Ret);
        return HI_FAILURE;
    }
    
    s32Ret = HI_MPI_VI_EnableChn(ViChn);
    if (s32Ret != HI_SUCCESS)
    {
        enc_err("failed with %#x!\n", s32Ret);
        return HI_FAILURE;
    }

    return HI_SUCCESS;
}

/*****************************************************************************
* function : star vi according to product type
*****************************************************************************/
HI_S32 enc_vi_start(int chan_num, stENC_VI_INFO *p_videoin)
{
    VI_DEV ViDev;
    VI_CHN ViChn;
    HI_S32 s32Ret;
    SIZE_S stTargetSize;
    RECT_S stCapRect;
    //VI_CHN_BIND_ATTR_S stChnBindAttr;
	enc_vi_param_s stViParam;
	//enc_vi_mode_e enViMode = ENC_VI_MODE_4_1080P;

    /*** get parameter from Sample_Vi_Mode ***/
    s32Ret = enc_vi_SelectParam(&stViParam);
    if (HI_SUCCESS !=s32Ret) 
	{
        enc_err("vi get param failed!\n");
        return HI_FAILURE;
    }

	if (chan_num >= stViParam.s32ViDevCnt) {
        enc_err("channel num more than %d\n", stViParam.s32ViDevCnt);
        return HI_FAILURE;		
	}
	
//    s32Ret = enc_vi_Mode2Size(enViMode, &stCapRect, &stTargetSize);
//    if (HI_SUCCESS !=s32Ret)
//    {
//        enc_err("vi get size failed!\n");
//        return HI_FAILURE;
//    }


	stCapRect.s32X = 0;
	stCapRect.s32Y = 0;

	stCapRect.u32Height = p_videoin->height;
	stCapRect.u32Width = p_videoin->width;

	stTargetSize.u32Height = p_videoin->height;
	stTargetSize.u32Width = p_videoin->width;
    /*** Start HDMI ***/
    s32Ret = enc_vi_HDMI();
    if (HI_SUCCESS !=s32Ret)
    {
        enc_err("Start HDMI failed!\n");
        return HI_FAILURE;
    }

    /*** Start VI Dev ***/
    ViDev = chan_num * stViParam.s32ViDevInterval;
    s32Ret = enc_vi_StartDev2(ViDev, p_videoin);
    if (HI_SUCCESS != s32Ret)
    {
        enc_err("enc_vi_StartDev failed with %#x\n", s32Ret);
        return HI_FAILURE;
    }

    /*** Start VI Chn ***/
	ViChn = chan_num * stViParam.s32ViChnInterval;
    s32Ret = enc_vi_StartChn(ViChn, &stCapRect, &stTargetSize, p_videoin->interlace, VI_CHN_SET_NORMAL);
    if (HI_SUCCESS != s32Ret)
    {
        enc_err("call enc_vi_StartChn failed with %#x\n", s32Ret);
        return HI_FAILURE;
    } 

    return HI_SUCCESS;
}

/*****************************************************************************
* function : stop vi accroding to product type
*****************************************************************************/
HI_S32 enc_vi_stop(int chan_num)
{
    VI_DEV ViDev;
    VI_CHN ViChn;

    HI_S32 s32Ret;
	enc_vi_param_s stViParam;
    
    /*** get parameter from Sample_Vi_Mode ***/
    s32Ret = enc_vi_SelectParam(&stViParam);
    if (HI_SUCCESS !=s32Ret) 
	{
        enc_err("vi get param failed!\n");
        return HI_FAILURE;
    }

    /* Stop vi phy-chn */
    ViChn = chan_num * stViParam.s32ViChnInterval;
    s32Ret = HI_MPI_VI_DisableChn(ViChn);
    if (HI_SUCCESS != s32Ret)
    {
        enc_err("SAMPLE_COMM_VI_StopChn failed with %#x\n",s32Ret);
        return HI_FAILURE;
    }

    /*** Stop VI Dev ***/
    ViDev = chan_num * stViParam.s32ViDevInterval;
    s32Ret = HI_MPI_VI_DisableDev(ViDev);
    if (HI_SUCCESS != s32Ret)
    {
        enc_err("SAMPLE_COMM_VI_StopDev failed with %#x\n", s32Ret);
        return HI_FAILURE;
    }

    return HI_SUCCESS;
}

/*****************************************************************************
* function : Vi chn bind vpss group
*****************************************************************************/
HI_S32 enc_vi_BindVpss(HI_S32 chan_num)
{
    HI_S32 s32Ret;
    VPSS_GRP VpssGrp;
    MPP_CHN_S stSrcChn;
    MPP_CHN_S stDestChn;
    enc_vi_param_s stViParam;
    VI_CHN ViChn;

    s32Ret = enc_vi_SelectParam(&stViParam);
    if (HI_SUCCESS !=s32Ret)
    {
        enc_err("SAMPLE_COMM_VI_Mode2Param failed!\n");
        return HI_FAILURE;
    }
    
    VpssGrp = chan_num;
    ViChn = chan_num * stViParam.s32ViChnInterval;

	printf("vichan %d vpssgroup %d\n", ViChn, VpssGrp);
    
    stSrcChn.enModId = HI_ID_VIU;
    stSrcChn.s32DevId = 0;
    stSrcChn.s32ChnId = ViChn;

    stDestChn.enModId = HI_ID_VPSS;
    stDestChn.s32DevId = VpssGrp;
    stDestChn.s32ChnId = 0;

    s32Ret = HI_MPI_SYS_Bind(&stSrcChn, &stDestChn);
    if (s32Ret != HI_SUCCESS)
    {
        enc_err("HI_MPI_SYS_Bind failed with %#x!\n", s32Ret);
        return HI_FAILURE;
    }
        
    return HI_SUCCESS;
}

/*****************************************************************************
* function : Vi chn unbind vpss group
*****************************************************************************/
HI_S32 enc_vi_UnBindVpss(HI_S32 chan_num)
{
    HI_S32 s32Ret;
    VPSS_GRP VpssGrp;
    MPP_CHN_S stSrcChn;
    MPP_CHN_S stDestChn;
    enc_vi_param_s stViParam;
    VI_CHN ViChn;

    s32Ret = enc_vi_SelectParam(&stViParam);
    if (HI_SUCCESS !=s32Ret)
    {
        enc_err("SAMPLE_COMM_VI_Mode2Param failed!\n");
        return HI_FAILURE;
    }
    
    VpssGrp = chan_num;
    ViChn = chan_num * stViParam.s32ViChnInterval;
    
    stSrcChn.enModId = HI_ID_VIU;
    stSrcChn.s32DevId = 0;
    stSrcChn.s32ChnId = ViChn;

    stDestChn.enModId = HI_ID_VPSS;
    stDestChn.s32DevId = VpssGrp;
    stDestChn.s32ChnId = 0;

    s32Ret = HI_MPI_SYS_UnBind(&stSrcChn, &stDestChn);
    if (s32Ret != HI_SUCCESS)
    {
        enc_err("HI_MPI_SYS_UnBind failed with %#x!\n", s32Ret);
        return HI_FAILURE;
    }
        
    return HI_SUCCESS;
}

